Tech jobs

Principal ASIC Design Engineer

North AmericaPrincipal

Automation PCIe Python Rtl SystemVerilog +1 skills

You will define microarchitecture and deliver parameterized SystemVerilog RTL for critical ASIC IP blocks and subsystems. You will lead front-end signoff, optimize PPA, integrate interfaces and memory systems, improve…

CesiumAstro

On-siteNorth AmericaFull-timeMiddle

FPGA Verification Engineer II

Automation CI/CD C++ FPGA Linux +6 skills

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee…

Rebellions

SoC Subsystem Design Engineer

On-siteAPAC

AI Rtl SystemVerilog Verilog

You will define SoC or subsystem architecture, create RTL designs, and integrate high-performance AI accelerator systems. You will coordinate IP integration with verification, software, and backend functions, work with…

Rebellions

IP Design Engineer

On-siteAPAC

AI Rtl SystemVerilog Verilog

You will define architectures and implement RTL for AI acceleration IPs and core SoC components. You will coordinate with verification, SoC integration, software, and DSP engineers, optimize hardware implementations of…

Rebellions

SoC/Top Design Engineer

APAC

AI GPU Linux Python Rtl +4 skills

You will design SoC top-level architecture and integrate RTL. You will integrate CPU, AI, and memory subsystems; define bus interconnects; manage clock, reset, and power domains; perform synthesis, timing, and power…

Midjourney

On-siteNorth AmericaPrincipal

Principal Electrical Engineer Design Lead

Altium Assembly C++ Firmware FPGA +8 skills

You will lead the scanner's electrical architecture and all board-level design. You will take complex boards from architecture through layout, vendor management, bring-up, and revision control. You will develop…

Cerebras Systems, Inc.

On-siteNorth AmericaStaff

Senior Staff Design Verification Engineer

Automation OOP Perl Python SystemVerilog +1 skills

You will develop verification strategies, tests, coverage plans, and reusable verification environments. You will manage regressions, debug failures across simulation, emulation, and silicon bring-up, and improve…

Cerebras Systems, Inc.

Design Verification Engineer

On-siteNorth America

Automation Firmware OOP Perl Python +3 skills

You will develop verification strategies, tests, coverage plans, and reusable environments based on microarchitecture. You will implement and debug tests, manage regressions and coverage, analyze issues across…

FuriosaAI

Senior Design Verification Engineer

APACSenior

Bash Ethernet PCIe Perl Python +2 skills

You will define and implement block- and system-level verification strategies. You will write and review test plans, develop test harnesses and sequences, and drive verification closure against coverage metrics. You…

FuriosaAI

Hardware Design Verification Engineer

On-siteAPAC

Bash Perl Python SystemVerilog Tcl +1 skills

You will define and implement verification plans for blocks, IP, subsystems, and SoCs. You will build test benches, develop functional tests, drive verification closure through coverage metrics, debug design failures…

Emulation Test Engineer

North America

AI Automation Bash C++ Firmware +5 skills

You will lead pre-silicon validation on the Cadence Palladium platform. You will architect model builds and partitioning, maintain emulation and co-simulation environments, execute interface and memory validation…

Director of Silicon Validation

HybridNorth America

Asic CI/CD Firmware FPGA PCIe +5 skills

You will lead pre-silicon verification, hardware emulation, and post-silicon validation through tape-out and production. You will set verification strategy, build emulation and regression infrastructure, lead silicon…

Director of ASIC Design

RemoteNorth America

AI Asic Prototyping Rtl SystemVerilog +1 skills

You will lead design, development, verification, and execution for high-performance AI inference chips. You will define ASIC architecture, microarchitecture, and roadmaps; optimize power, performance, area, and memory…

ASIC Design Verification Engineer

HybridNorth America

AI Asic FPGA Machine Learning Perl +5 skills

You will develop verification strategies, test plans, methodologies, and SystemVerilog UVM environments for AI inference ASICs. You will create simulations and tests, drive coverage closure and root-cause analysis,…

ASIC Design Engineer

On-siteNorth America

Automation PCIe Rtl SystemVerilog

You will define microarchitecture and deliver parameterized SystemVerilog RTL for complex IP blocks and subsystems. You will lead signoff activities, optimize PPA, integrate interfaces and memory technologies, improve…

AI FPGA Machine Learning SystemVerilog Uvm

Design Verification Lead AI Hardware

HybridNorth AmericaLead

Canada

You will lead verification strategy for next-generation AI hardware and guide verification engineers in validating AI core functionality and performance. You will architect verification plans, benchmark on-chip…

RemoteEurope, North America

Front End Design Verification Engineer

You will verify the fetch unit for next-generation high-performance RISC-V CPU cores. You will develop verification strategies and tests, debug complex failures, and validate instruction fetch, prediction, decode, and…

C++ Python SystemVerilog Uvm

RemoteEurope, North AmericaMiddle

Mid Core Design Verification Engineer

Spain

You will verify next-generation high-performance RISC-V CPU cores. You will develop verification strategies, test plans, and testbenches; create constrained-random tests, assertions, and coverage; debug RTL and…

C++ Python SystemVerilog Uvm

Senior Staff Engineer CPU Front-End Verification

HybridNorth AmericaStaff