Design Verification Lead AI Hardware

You will lead verification strategy for next-generation AI hardware and guide verification engineers in validating AI core functionality and performance. You will architect verification plans, benchmark on-chip networks, develop portable test strategies, implement resiliency testing, and align hardware verification with software requirements.

Responsibilities

• Lead verification engineers and define AI core test strategies
• Architect verification plans for mixed-precision data types and AI transformations
• Benchmark on-chip networks for throughput, bandwidth, and congestion management
• Implement concurrency controls, multi-core synchronization, and error injection
• Develop portable verification strategies from subsystem simulation through FPGA and silicon
• Align hardware architecture and software requirements to meet performance targets

Requirements

• Experience leading ASIC or SoC teams through complex tape-outs
• Expertise in AI and ML architectures, tensor operations, and high-performance compute
• Knowledge of AI data types, AI data-movement compute patterns, and on-chip network validation
• Proficiency in UVM, SystemVerilog, and cocotb
• Experience with coverage-driven verification methodologies
• Eligibility to access U.S. export-controlled technology