Tech jobs
Job listings
Hardware Mechanical Engineer
You will design and develop mechanical systems for AI accelerators, NPU cards, servers, and rack systems. You will create 3D models, assemblies, and 2D drawings in PTC Creo; integrate PCB assemblies and server chassis;…
Hardware Design Verification Engineer
You will define and implement verification plans for blocks, IP, subsystems, and SoCs. You will build test benches, develop functional tests, drive verification closure through coverage metrics, debug design failures…
Hardware AI Chip Architect
You will define architecture and microarchitecture specifications, own chip modules, and implement them in RTL. You will optimize functionality, power, timing, and area, create test benches, and debug complex logic…
RF Electronics Engineer
About Commonwealth Fusion Systems: Commonwealth Fusion Systems is on a mission to deliver the urgent transition to fusion energy. Combining decades of research, top talent, and new technologies, we’re designing and…
Director of ASIC Design
You will lead design, development, verification, and execution for high-performance AI inference chips. You will define ASIC architecture, microarchitecture, and roadmaps; optimize power, performance, area, and memory…
Senior ASIC Physical Design Engineer
You will contribute to physical implementation of AI accelerators from floorplanning through tapeout. You will support floorplanning, macro placement, power planning, clock tree synthesis, place and route, routing…
ASIC Design Verification Engineer
You will develop verification strategies, test plans, methodologies, and SystemVerilog UVM environments for AI inference ASICs. You will create simulations and tests, drive coverage closure and root-cause analysis,…
ASIC Design Engineer
You will define microarchitecture and deliver parameterized SystemVerilog RTL for complex IP blocks and subsystems. You will lead signoff activities, optimize PPA, integrate interfaces and memory technologies, improve…
Physical Design Engineer Timing
You will drive timing convergence across blocks, partitions, sections, and top-level designs. You will generate and validate timing models, analyze violations, develop fixes, debug timing-flow issues, and support…
Staff Hardware Engineering Program Manager
At WHOOP, we're on a mission to unlock and inspire performance for life WHOOP empowers members to perform at a higher level through a deeper understanding of their bodies and daily lives. WHOOP is seeking a Staff…
Chiplet Physical Design Engineer
You will design and integrate chiplets into System-in-Package solutions. You will own synthesis, place-and-route, timing closure, ECO flows, and physical verification convergence for high-speed CPU designs on advanced…
Design Verification Lead AI Hardware
You will lead verification strategy for next-generation AI hardware and guide verification engineers in validating AI core functionality and performance. You will architect verification plans, benchmark on-chip…
Field Application Engineer AI Software and Hardware
You will work directly with enterprise customers to understand technical challenges and deliver effective solutions through meetings, presentations, and workshops. You will collaborate with sales, provide customer…
Field Application Engineer AI Software and Hardware
You will work directly with enterprise customers in meetings, presentations, and workshops to understand technical challenges and provide effective AI solutions. You will collaborate with sales operations and product…
Physical Design Engineer
You will own the end-to-end physical implementation flow for high-performance CPU and AI/ML blocks, from synthesis through tapeout. You will optimize performance, power, and area, collaborate with RTL engineers, and…
Physical Design Engineer AI Accelerator IP
You will own end-to-end physical implementation for RISC-V CPU and AI accelerator IP blocks. You will perform synthesis, place-and-route, timing closure, and GDSII signoff, develop implementation collateral, and work…
Physical Design Engineer Die to Die Interface RTL to GDSII
You will lead physical implementation and closure for high-speed die-to-die PHYs and controllers. You will own the RTL-to-GDSII flow, drive timing and verification, improve automation, and partner with chiplet and…