Physical Design Engineer

You will own the end-to-end physical implementation flow for high-performance CPU and AI/ML blocks, from synthesis through tapeout. You will optimize performance, power, and area, collaborate with RTL engineers, and resolve complex design issues across hierarchies.

Responsibilities

• Implement high-performance CPU and AI/ML blocks from synthesis through tapeout
• Own the complete physical implementation flow
• Optimize performance, power, and area
• Collaborate with RTL engineers to improve implementation outcomes
• Debug complex issues across design hierarchies

Requirements

• Experience in SoC/ASIC physical design and successful tapeouts
• Experience with synthesis, place-and-route, and timing closure on taped-out designs
• Expertise with FusionCompiler, PrimeTime, and RedHawk
• Proficiency in Tcl, Perl, and Python
• Understanding of advanced-node challenges and low-power design techniques
• Experience driving physical design requirements from architecture through signoff