Chiplet Physical Design Engineer

You will design and integrate chiplets into System-in-Package solutions. You will own synthesis, place-and-route, timing closure, ECO flows, and physical verification convergence for high-speed CPU designs on advanced process nodes.

Responsibilities

• Own synthesis and place-and-route for high-speed CPU core designs
• Drive timing closure, ECO flows, and physical verification convergence
• Contribute to performance, power, and area outcomes
• Collaborate with internal experts and external partners

Requirements

• Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or Computer Science
• 10+ years of industry experience in physical design for CPU or GPU products
• Experience with Synopsys and/or Cadence tools across synthesis, place-and-route, and closure
• Expertise in timing closure, ECO flows, and physical verification convergence
• TCL scripting proficiency
• English communication skills
• Eligibility to access U.S. export-controlled technology