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Senior Design for Test Engineer
You will own end-to-end DFT implementation for AI accelerators, from micro-architecture definition through tapeout and first-silicon bring-up. You will implement and integrate DFT logic in RTL and third-party IP,…
平头哥-DFT设计/DFT CAD开发高级工程师/专家-深圳
The candidate is expected to be responsible for following tasks: Participate in complex Chip DFT/DFD feature and architecture definition Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test…
平头哥-DFT设计/DFT CAD开发高级工程师/专家-北京
The candidate is expected to be responsible for following tasks: Participate in complex Chip DFT/DFD feature and architecture definition Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test…
Director, Digital Design & Verification
Deliver high-quality digital design and verification across all programs (schedule, performance, silicon success) Achieve predictable execution with early risk identification and strong mitigation frameworks Improve…
Principal ASIC Design Engineer
You will define microarchitecture and deliver parameterized SystemVerilog RTL for critical ASIC IP blocks and subsystems. You will lead front-end signoff, optimize PPA, integrate interfaces and memory systems, improve…
SoC Subsystem Design Engineer
You will define SoC or subsystem architecture, create RTL designs, and integrate high-performance AI accelerator systems. You will coordinate IP integration with verification, software, and backend functions, work with…
IP Design Engineer
You will define architectures and implement RTL for AI acceleration IPs and core SoC components. You will coordinate with verification, SoC integration, software, and DSP engineers, optimize hardware implementations of…
SoC/Top Design Engineer
You will design SoC top-level architecture and integrate RTL. You will integrate CPU, AI, and memory subsystems; define bus interconnects; manage clock, reset, and power domains; perform synthesis, timing, and power…
Design Verification Engineer
You will develop verification strategies, tests, coverage plans, and reusable environments based on microarchitecture. You will implement and debug tests, manage regressions and coverage, analyze issues across…
Senior SoC Design Engineer
You will determine SoC architecture based on requirements, performance targets, and system specifications. You will document microarchitecture and design RTL. You will integrate subsystems, perform timing closure, lint…
Hardware AI Chip Architect
You will define architecture and microarchitecture specifications, own chip modules, and implement them in RTL. You will optimize functionality, power, timing, and area, create test benches, and debug complex logic…
Director of ASIC Design
You will lead design, development, verification, and execution for high-performance AI inference chips. You will define ASIC architecture, microarchitecture, and roadmaps; optimize power, performance, area, and memory…
ASIC Design Engineer
You will define microarchitecture and deliver parameterized SystemVerilog RTL for complex IP blocks and subsystems. You will lead signoff activities, optimize PPA, integrate interfaces and memory technologies, improve…
Interconnect and Compute Architect
You will help define next-generation CPU networking architecture for datacenter and robotics applications. You will guide architectural decisions across forwarding, buffering, modeling, and RTL design, and collaborate…
System IP RTL Design Lead
You will lead the technical definition, selection, and integration of system IP for advanced SoCs. You will define requirements, specifications, interfaces, and integration methods; guide IP design through sign-off;…
Hardware Technical Program Manager
Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose…
Senior Engineer CAD Pre-Silicon Front End
You will own RTL, register-generation, design-verification, emulation, and FPGA-prototyping flows. You will build AI-assisted tooling, maintain reliable engineering workflows, improve productivity, and partner on DFT…
Physical Design Engineer
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future…
Senior Staff/Principal Engineer, Digital Design (Power & Analog ICs)
We are seeking a Senior Staff Digital Design Engineer to architect and implement the digital content within power, analog, and mixed-signal IC products. This is a senior individual-contributor role requiring ownership…