Velaura AI, Inc.
Open positions
Functional Safety Architect
You will define functional safety goals, mechanisms, and fault-handling strategies for SoCs. You will lead safety analyses, establish safety processes, develop safety cases, embed requirements across hardware and…
RTL Designer
You will design, implement, and optimize RTL for core SoC components. You will collaborate on microarchitecture and hardware-software co-design, define hardware interfaces and execution flows, analyze performance…
SoC Design Verification Engineer
You will plan and execute system-level verification for assigned SoC areas. You will build simulation environments, verify boot, security, clock, reset, power, IO, and memory subsystems, run CDC and RDC analysis,…
Senior Design Verification Engineer
You will develop verification strategies and environments for complex SoC hardware. You will validate system behavior, performance, reliability, safety, low-power behavior, clocking, and reset behavior, while…
Design Verification Engineer CPU
You will own verification for functional domains of a custom CPU, from test planning through coverage closure. You will build verification environments, develop instruction-level stimulus, validate CPU behavior and…
Design Verification Engineer
You will develop verification strategies and environments for complex SoC hardware. You will verify system behavior, performance, reliability, and safety across RTL blocks and hardware/software systems, investigate…
Design Verification Engineer AI Accelerator
You will own verification of custom AI acceleration units, including matrix and vector compute engines. You will build test and coverage plans, develop reference models, verify numerical behavior and data flow,…
CAD Back-end Lead
You will build, integrate, qualify, release, and support CAD flows across custom design, physical implementation, and physical verification. You will develop reusable frameworks, automate regression testing and quality…
SoC Design Verification Lead
You will own the SoC verification strategy, plan, architecture, and execution. You will lead verification engineers, coordinate system-level verification areas, drive coverage closure and tape-out readiness, report…
SoC Design Verification Engineer
You will plan and execute system-level SoC verification, build simulation environments, and verify boot, security, clock, reset, low-power, IO, and memory behavior. You will run CDC and RDC analysis, assess…
Senior Engineer CAD Pre-Silicon Front End
You will own RTL, register-generation, design-verification, emulation, and FPGA-prototyping flows. You will build AI-assisted tooling, maintain reliable engineering workflows, improve productivity, and partner on DFT…
Director of IT Infrastructure and Operations
You will own IT infrastructure and operations end to end, establishing a 12–24 month architecture direction while remaining closely involved in major technical decisions and troubleshooting. You will forecast and…
Design Verification Engineer – CPU
You will own verification for custom CPU units such as instruction fetch, decode, load-store logic, and multiple cache levels. You will create test and coverage plans, build portable verification environments, develop…
Design Verification Engineer – AI Accelerator Lead
You will own verification for custom AI acceleration units, including matrix and vector compute engines. You will translate microarchitecture into test and coverage plans, build portable verification environments,…
Senior Design Verification Engineer – Physical AI Compute
You will develop and execute verification strategies for a Physical AI SoC, build SystemVerilog and UVM verification environments, define coverage goals, and verify compute engines, memory systems, interconnects,…
Custom Circuit Design (Sr. Staff / Principal)
Velaura seeks a Sr. Staff/Principal Custom Circuit Design Engineer to lead high-performance, low-power standard-cell libraries and custom digital circuits across advanced process technologies. The role covers…
Principal AI SoC Runtime Software Architect
Own the software architecture for a heterogeneous AI SoC and define the end-to-end runtime across sensor ingest, preprocessing, AI inference, postprocessing, and application delivery. Coordinate workloads and data…
