Velaura AI, Inc.
Open positions
SoC Design Verification Lead
You will own the SoC verification strategy, plan, architecture, and execution. You will lead verification engineers, coordinate system-level verification areas, drive coverage closure and tape-out readiness, report…
SoC Design Verification Engineer
You will plan and execute system-level SoC verification, build simulation environments, and verify boot, security, clock, reset, low-power, IO, and memory behavior. You will run CDC and RDC analysis, assess…
Senior Engineer CAD Pre-Silicon Front End
You will own RTL, register-generation, design-verification, emulation, and FPGA-prototyping flows. You will build AI-assisted tooling, maintain reliable engineering workflows, improve productivity, and partner on DFT…
Director of IT Infrastructure and Operations
You will own IT infrastructure and operations end to end, establishing a 12–24 month architecture direction while remaining closely involved in major technical decisions and troubleshooting. You will forecast and…
Design Verification Engineer – CPU
You will own verification for custom CPU units such as instruction fetch, decode, load-store logic, and multiple cache levels. You will create test and coverage plans, build portable verification environments, develop…
Design Verification Engineer – AI Accelerator Lead
You will own verification for custom AI acceleration units, including matrix and vector compute engines. You will translate microarchitecture into test and coverage plans, build portable verification environments,…
Senior Design Verification Engineer – Physical AI Compute
You will develop and execute verification strategies for a Physical AI SoC, build SystemVerilog and UVM verification environments, define coverage goals, and verify compute engines, memory systems, interconnects,…
Custom Circuit Design (Sr. Staff / Principal)
Velaura seeks a Sr. Staff/Principal Custom Circuit Design Engineer to lead high-performance, low-power standard-cell libraries and custom digital circuits across advanced process technologies. The role covers…
Principal AI SoC Runtime Software Architect
Own the software architecture for a heterogeneous AI SoC and define the end-to-end runtime across sensor ingest, preprocessing, AI inference, postprocessing, and application delivery. Coordinate workloads and data…
RTL Designer – Physical AI Compute
Design and optimize RTL for key portions of a Physical AI SoC, develop microarchitectures, define hardware interfaces and execution flows, contribute to compute and memory subsystems, optimize performance, power, and…
Performance Modeling Architect – AI Systems
Develop system-level performance models and simulation frameworks for AI workloads and compute architectures, modeling SoC components, software runtime behavior, memory systems, and interconnects to analyze…
Design Verification Engineer – Physical AI Compute
Develop and execute verification strategies for complex SoC components and systems, building SystemVerilog and UVM environments, verifying hardware-software interactions, analyzing performance and real-time behavior,…
Security Architect
Own the end-to-end security architecture for a Physical AI SoC, defining hardware roots of trust, secure boot, key management, secure debug, and lifecycle strategies. Protect AI workloads and sensitive assets, lead…
Power Management Architect, Physical AI SoC
Own the power architecture of a Physical AI SoC, defining power domains, voltage and frequency scaling, power states, power delivery, energy budgets, power-control subsystems, power intent, and power and thermal…
Functional Safety Architect
Own the functional safety architecture for a Physical AI SoC, defining safety goals, mechanisms, fault handling, quantitative metrics, RTL and firmware requirements, safety cases, certification, audits, and…
AI Systems Architect
Analyze modern AI model architectures, evaluate computational and system requirements, and map them to specialized hardware. Translate model requirements into efficient silicon implementations, optimize models and…
Director of Finance
Lead financial strategy, planning, budgeting, forecasting, accounting operations, reporting, cash flow, capital allocation, treasury functions, audits, tax filings, regulatory reporting, financial systems, growth…
DFT Engineer Architect Manager Senior Manager
Lead Design-for-Test architecture, methodology, implementation, verification, and sign-off for complex ASIC and SoC designs. Drive test planning, pattern generation, coverage closure, memory and logic BIST strategies,…