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Teach Lead Physical Design Engineer
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…
Tech Lead ASIC Design Engineer
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…
Technical Lead Physical Design Engineer
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…
Silicon Physical Design Engineer III
This is a remote position. Top non-negotiable skill sets required for this role: Strong understanding in the RTL2GDSII flow and design tapeouts in 16nm/14nm or below process technologies Experience with low power…
Hardware Engineer III
This is a remote position. What are the top non-negotiable skill sets required for this role? Experience in writing models using different flavors of TLM, especially, Synopsys’ Fast timed (FT) flavor Experience…
平头哥-CPU物理设计专家-北京
作为物理设计团队的一员，你将参与打造基于先进工艺的下一代服务器SoC芯片，一方面将驱动整个RTL2GDS的物理设计交付流程，包括 Floorplan, Synthesis, P&R, Timing, PI, Power 以及Sign-offs；另一方面也将专注于芯片PPA（性能、功耗、面积）的优化工作。 工作职责包括但不限于以下几个方面: 在先进工艺节点上实现复杂的CPU模块； 与架构师及设计人员密切合作进行PPA的优化；…
Senior ASIC Design Verification Engineer
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including…
Senior FPGA Engineer
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including…
Senior FPGA Engineer (TS/SCI)
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including…
Staff SLT Test Engineer
About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software…
平头哥-芯片后端设计专家-上海
As a member of the PD team, you will build the next generation networking SoC in advanced process. You will drive the backend flow through the entire RTL2GDS process including floor planning, P&R, timing, PI, and…
平头哥-芯片后端设计专家-深圳
As a member of the PD team, you will build the next generation networking SoC in advanced process. You will drive the backend flow through the entire RTL2GDS process including floor planning, P&R, timing, PI, and…
达摩院-SRAM/FIP定制电路工程师-RISC V及生态
面向高性能SRAM, 基础IP或标准单元（如触发器、脉冲锁存器、逻辑触发器、特殊复杂单元等）的设计、验证及库生成。与晶圆厂开展DTCO（设计/工艺协同优化） 针对性能、功耗和面积（PPA）以及良率优化SRAM/定制电路。 开发定制版图并执行物理验证（例如，DRC、LVS）。 开展大量电路仿真，以验证SRAM的功能与性能、电气完整性及鲁棒性。 …