Power Architect

You will predict power consumption during architecture and track it through RTL evolution. You will propose architectural changes, build workloads that represent real-world use cases, guide thermal and power-delivery solutions, correlate pre-silicon estimates with silicon measurements, and drive power-efficiency improvements.

Responsibilities

• Predict power consumption during architecture and track it through RTL evolution
• Propose architectural changes for power optimization
• Build workloads that stress real-world use cases
• Guide thermal and power-delivery solutions
• Correlate pre-silicon estimates to silicon measurements
• Drive power-efficiency improvements

Requirements

• 15+ years of experience with PowerArtist, PtPX, RTL Architect, or PrimePower
• Knowledge of architectural power modeling and optimization, power-gating, voltage domains, and leakage control
• Track record of influencing architectural and microarchitectural changes that reduce power
• Proficiency in Verilog HDL, Design Compiler, C/C++, and Python
• Background in power optimization for compute datapaths or interconnects
• Eligibility to access U.S. export-controlled technology