平头哥-AI芯片低功耗设计专家-上海

As a member of the power team, works with the front-end design team together to deliver the excellent power efficiency product. The responsibility includes (but is not limited to):

• Identify/optimize RTL design power by workload power simulation and analysis.
• Co-work with design/verification teams to define and develop different power tests.
• Low power features development and verification.
• Delivery different workloads’ power simulation data for IR-drop, PDN and thermal analysis.
• Define power optimization solution/methodology/flow and drive them into the design.

• +5 years validated experience in RTL design/verification.
• Experienced in power analysis/optimization at architecture/RTL/block synthesis.
• Experienced in one or more power features design (like droop-mitigation, peak current control, dynamic frequency scaling, etc…)
• A strong coding skill in Perl or Python or other script languages and the validated flow development experience.
• Good understanding of the synthesis/backend flows and technology for power.
• Experience with tools (Spyglass, PowerArtist, PtPx) is a plus.
• Experience in silicon level power features bring-up is a plus.
• Strong problem solving and analytical skills and excellent cross-functional communication skills.