Physical Implementation Engineer DFT

You will implement scan, BIST, BIRA, and DFT logic; plan package-level testing; and support DFT from synthesis through production. You will improve test and fault coverage, analyze quality-of-results trends, and support DSPs or contractors in delivering high-quality work on schedule.

Responsibilities

• Implement scan compressor insertion, DFT simulation, and SoC DFT planning
• Implement and simulate Logic BIST and BIRA/BIST
• Plan package-level testing
• Implement scan-dump and scan-to-DRAM logic
• Support DFT from synthesis through production
• Propose architecture and implementation changes that improve test and fault coverage
• Support DSPs and contractors to meet turnaround-time targets with high-quality results

Requirements

• Bachelor's degree or higher in Electrical Engineering or equivalent practical experience
• At least 8 years of experience with EDA tool workflows in the semiconductor industry
• Proficiency with Tcl, Perl, or Python for workflow automation and data visualization
• Extensive experience with physical-design processes and RTL-to-GDS automation tools
• Understanding of advanced 2.5D, 3D, and chiplet packaging
• Experience leading physical implementation
• Experience extracting design parameters, summarizing QoR, and analyzing QoR trends