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Cerebras Systems, Inc.

FPGA Engineer

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Description

You will design and lead chassis-to-wafer IO architecture, improve RTL, and implement FPGA designs for current and future systems. You will produce production-ready bitstreams, optimize network datapaths, support board bring-up, debug AI cluster performance, and coordinate technical work across hardware and software teams.

Responsibilities

  • Lead chassis-to-wafer IO architecture and design
  • Improve RTL and implement next-generation FPGA designs
  • Produce production-ready bitstreams for large inference clusters
  • Collaborate with verification engineers to prevent bugs and simplify debugging
  • Optimize FPGA datapath bandwidth and latency
  • Facilitate and execute board bring-up
  • Drive network performance debugging for large AI clusters
  • Integrate networking technologies and protocols
  • Lead cross-functional network IO projects
  • Communicate clearly across teams and stakeholders

Requirements

  • 5+ years of industry experience producing FPGA solutions or a Master's or PhD in Computer or Electrical Engineering plus 3 years of industry experience
  • Verilog proficiency
  • Git experience
  • FPGA placement and routing expertise
  • Timing closure, simulation, and debugging experience
  • TCP and RoCE familiarity
  • Wireshark experience
  • Knowledge of network switch environments or willingness to learn

Skills

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See also

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