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Tenstorrent

Engineering Program Manager RISCV

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Description

You will support CPU development from specification through tapeout and post-silicon debug. You will own defined workstreams, maintain schedules, track dependencies and resourcing, align engineering functions, identify risks, and drive open issues to closure.

Responsibilities

  • Support the full CPU development cycle
  • Own defined workstreams end to end
  • Build and maintain schedules
  • Track dependencies and resourcing
  • Drive execution across engineering teams
  • Identify and escalate risks
  • Drive risks to closure

Requirements

  • Experience in CPU, SoC, or silicon development
  • Experience working with cross-functional engineering teams
  • Experience with at least one silicon program through tapeout, bring-up, or IP release
  • Functional Safety standards exposure is a plus
  • ISO 26262 exposure is a plus
  • Automotive hardware development requirements exposure is a plus
  • Eligibility to access U.S. export-controlled technology

Skills

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See also

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