CPU Core Design Verification Testbench Lead

You will lead CPU core-level testbench development and evolve CVM-based verification infrastructure. You will plan functional verification, develop testbench components and stimulus, debug regressions, close coverage, and build Python and AI-agent tooling for verification analysis.

Responsibilities

• Lead CPU core-level testbench development
• Own and evolve CVM-based verification methodology and infrastructure
• Plan and drive functional verification for CPU features, ISA behavior, and microarchitectural scenarios
• Develop UVM, assembly, C/C++ stimulus, and C++ functional models
• Debug regressions and close coverage
• Improve testbenches across simulation, emulation, and post-silicon environments
• Develop Python and AI-agent tooling for triage and root-cause analysis

Requirements

• 8+ years in CPU verification, CPU testbench development, or related digital design
• CPU core-level testbench development experience
• Out-of-order CPU microarchitecture knowledge
• CVM methodology
• UVM
• RTL
• Waveform, log, regression, and debug experience
• Python
• C++
• RISC-V
• Eligibility to access U.S. export-controlled technology